Development of III-V MOSFET process modules compatible with silicon ULSI manufacture

Thayne, I. , Li, X. , Jansen, W., Ignatova, O. , Bentley, S., Zhou, H., Macintyre, D., Thoms, S. and Hill, R. (2009) Development of III-V MOSFET process modules compatible with silicon ULSI manufacture. ECS Transactions, 25(7), pp. 385-395. (doi: 10.1149/1.3203975)

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To address issues associated with continual scaling of the International Technology Roadmap for Semiconductors (ITRS) [1] to follow Moore's Law, MOSFETs with high mobility channel materials are now being seriously considered. As a result, there has been a significant expansion in research into III-V MOSFETs as a potential n-channel device solution. For ultimate CMOS exploitation, self-aligned III-V MOSFETs with sub-20 nm critical dimensions will have to be realized using silicon compatible process flows. This paper reviews the current status of III-V MOSFET research from the perspective of silicon ULSI process compatibility.

Item Type:Articles
Additional Information:6th Symposium on ULSI Process Integration held at the 216th Meeting of the Electrochemical-Society, Vienna, Austria, 4-9 Oct 2009
Glasgow Author(s) Enlighten ID:Zhou, Dr Haiping and Thayne, Prof Iain and Bentley, Dr Steven and Jansen, Mr Wout and Thoms, Dr Stephen and Hill, Mr Richard and Li, Dr Xu and Macintyre, Dr Douglas and Ignatova, Dr Olesya
Authors: Thayne, I., Li, X., Jansen, W., Ignatova, O., Bentley, S., Zhou, H., Macintyre, D., Thoms, S., and Hill, R.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
Journal Name:ECS Transactions
Publisher:Electrochemical Society
ISSN (Online):1938-6737

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