Rogers, E. and Li, Y. (1991) Systolic array based processing for linear multivariable feedback control schemes. In: 30th IEEE Conference on Decision and Control, Brighton, UK, 11-13 Dec 1991, pp. 2366-2367. (doi: 10.1109/CDC.1991.261607)
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Publisher's URL: http://dx.doi.org/10.1109/CDC.1991.261607
Abstract
Candidate array architectures for the implementation of multivariable systems are developed. Following preliminary development of a SIMD architecture, the dual look-ahead approach is introduced in order to reduce the processing delay associated with M-expanded pipelining. Macro-systolic architectures mapped from this are also given. Both word-level and lower-level pipelining have been studied under the constraint of retaining a short and system-order-independent latency. Trade-offs exist in all of these architectures. These architectures can also be mapped onto coarse-grain architectures, such as those based on transputers, with each realizing a matrix-vector multiplier or a systolic cell.
Item Type: | Conference Proceedings |
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Status: | Published |
Refereed: | Yes |
Glasgow Author(s) Enlighten ID: | Li, Professor Yun |
Authors: | Rogers, E., and Li, Y. |
Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering |
College/School: | College of Science and Engineering > School of Engineering > Systems Power and Energy |
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