Efficient dynamic heap allocation of scratch-pad memory

McIlroy, R., Dickman, P. and Sventek, J. (2008) Efficient dynamic heap allocation of scratch-pad memory. In: ISMM: 7th International Symposium on Memory Management, Tucson, AZ, USA, 7-8 Jun 2008, pp. 31-40. (doi: 10.1145/1375634.1375640)

Abstract

<p>An increasing number of processor architectures support scratch-pad memory - software managed on-chip memory. Scratch-pad memory provides low latency data storage, like on-chip caches, but under explicit software control. The simple design and predictable nature of scratchpad memories has seen them incorporated into a number of embedded and real-time system processors. They are also employed by multi-core architectures to isolate processor core local data and act as low latency inter-core shared memory.</p> <p>Managing scratch-pad memory by hand is time consuming, error prone and potentially wasteful; tools that automatically manage this memory are essential for its use by general purpose software. While there has been promising work in compile time allocation of scratch-pad memory, there will always be applications which require run-time allocation. Modern dynamic memory management techniques are too heavy-weight for scratch-pad management.</p> <p>This paper presents the Scratch-Pad Memory Allocator, a light-weight memory management algorithm, specifically designed to manage small on-chip memories. This algorithm uses a variety of techniques to reduce its memory footprint while still remaining effective, including: representing memory both as fixed-sized blocks and variable-sized regions within these blocks; coding of memory state in bitmap structures; and exploiting the layout of adjacent regions to dispense with boundary tags for split and coalesce operations. We compare the performance of this allocator against Doug Lea's malloc implementation for the management of core-local and inter-core shared scratchpad memories under real world memory traces. This algorithm manages small memories efficiently and scales well under load when multiple competing cores access shared memory.</p>

• Item Type: Conference Proceedings
• Additional Information: ISBN: 9781605581347
• Status: Published
• Refereed: Yes
• Glasgow Author(s) Enlighten ID: Sventek, Professor Joseph
• Authors: McIlroy, R., Dickman, P., and Sventek, J.
• College/School: College of Science and Engineering > School of Computing Science