Design and evaluation of high-performance processing elements for reconfigurable systems

Purohit, S. S., Chalamalasetti, S. R., Margala, M. and Vanderbauwhede, W. A. (2013) Design and evaluation of high-performance processing elements for reconfigurable systems. IEEE Transactions on Very Large Scale Integration Systems, 21(10), pp. 1915-1927. (doi: 10.1109/TVLSI.2012.2220868)

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Abstract

In this paper, we present the design and evaluation of two new processing elements for reconfigurable computing. We also present a circuit-level implementation of the data paths in static and dynamic design styles to explore the various performance-power tradeoffs involved. When implemented in IBM 90-nm CMOS process, the 8-b data paths achieve operating frequencies ranging over 1~GHz both for static and dynamic implementations, with each data path supporting single-cycle computational capability. A novel single-precision floating point processing element (FPPE) using a 24-b variant of the proposed data paths is also presented. The full dynamic implementation of the FPPE shows that it operates at a frequency of 1 GHz with 6.5-mW average power consumption. Comparison with competing architectures shows that the FPPE provides two orders of magnitude higher throughput. Furthermore, to evaluate its feasibility as a soft-processing solution, we also map the floating point unit onto the Virtex 4 and 5 devices, and observe that the unit requires less than 1% of the total logic slices, while utilizing only around 4% of the DSP blocks available. When compared against popular field-programmable-gate-array-based floating point units, our design on Virtex 5 showed significantly lower resource utilization, while achieving comparable peak operating frequency.

Item Type:Articles
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Vanderbauwhede, Professor Wim
Authors: Purohit, S. S., Chalamalasetti, S. R., Margala, M., and Vanderbauwhede, W. A.
College/School:College of Science and Engineering > School of Computing Science
Journal Name:IEEE Transactions on Very Large Scale Integration Systems
Publisher:IEEE
ISSN:1063-8210
ISSN (Online):1557-9999
Published Online:23 October 2012

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