Sinnott, R.O. et al. (2006) Meeting the design challenges of nano-CMOS electronics: an introduction to an upcoming EPSRC pilot project. In: Cox, S.J. (ed.) Proceedings of the UK e-Science All Hands Meeting 2006 : Nottingham, UK, 18th-21st September. National e-Science Centre: Edinburgh. ISBN 9780955398810
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Abstract
The years of ‘happy scaling’ are over and the fundamental challenges that the semiconductor industry faces, at both technology and device level, will impinge deeply upon the design of future integrated circuits and systems. This paper provides an introduction to these challenges and gives an overview of the Grid infrastructure that will be developed as part of a recently funded EPSRC pilot project to address them, and we hope, which will revolutionise the electronics design industry.
Item Type: | Book Sections |
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Status: | Published |
Refereed: | Yes |
Glasgow Author(s) Enlighten ID: | Cumming, Professor David and Millar, Mr Cameron and Asenov, Professor Asen and Sinnott, Professor Richard and Roy, Professor Scott |
Authors: | Sinnott, R.O., Asenov, A., Berry, D., Cumming, D., Furber, S., Millar, C., Murray, A., Pickles, S., Roy, S., Tyrell, A., and Zwolinski, M. |
Subjects: | Q Science > QA Mathematics > QA75 Electronic computers. Computer science |
College/School: | University Services > IT Services > Computing Service College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering |
Publisher: | National e-Science Centre |
ISBN: | 9780955398810 |
Copyright Holders: | Copyright © 2006 The Author |
Publisher Policy: | Reproduced with the permission of the author. |
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