Olsen, S.H., O'Neill, A.G., Chattopadhyay, S., Driscoll, L.S., Kwa, K.S.K., Norris, D.J., Cullis, A.G. and Paul, D.J. (2004) Study of single- and dual-channel designs for high-performance strained-Si-SiGe n-MOSFETs. IEEE Transactions on Electron Devices, 51(8), pp. 1245-1253. (doi: 10.1109/TED.2004.830652)
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Abstract
Results comparing strained-Si-SiGe n-channel MOSFET performance of single-and dual-surface channel devices fabricated using 15% Ge content SiGe virtual substrates are presented. Device fabrication used high thermal budget processes and virtual substrates were not polished. Mobility enhancement factors exceeding 1.6 are demonstrated for both single-and dual-channel device architectures compared with bulk-Si control devices. Single-channel devices exhibit improved gate oxide quality, and larger mobility enhancements, at higher vertical effective fields compared with the dual-channel strain-compensated devices. The compromised performance enhancements of the dual-channel devices are attributed to greater interface roughness and increased Ge diffusion resulting from the Si/sub 0.7/Ge/sub 0.3/ buried channel layer.
Item Type: | Articles |
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Additional Information: | This work was supported by the Engineering and Physical Sciences Research Council, U.K. |
Status: | Published |
Refereed: | Yes |
Glasgow Author(s) Enlighten ID: | Paul, Professor Douglas |
Authors: | Olsen, S.H., O'Neill, A.G., Chattopadhyay, S., Driscoll, L.S., Kwa, K.S.K., Norris, D.J., Cullis, A.G., and Paul, D.J. |
College/School: | College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering |
Journal Name: | IEEE Transactions on Electron Devices |
Publisher: | Institute of Electrical and Electronics Engineers |
ISSN: | 0018-9383 |
ISSN (Online): | 1557-9646 |
Published Online: | 07 July 2004 |
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