High-level programming of dynamically reconfigurable NoC-based heterogeneous multicore SoCs

Vanderbauwhede, W. (2010) High-level programming of dynamically reconfigurable NoC-based heterogeneous multicore SoCs. In: Shen, J.S. and Hsiung, P.A. (eds.) Dynamic Reconfigurable Network-on-Chip Design: Innovations for Computational Processing and Communication. Information Science Reference: Hershey, PA, USA, pp. 186-219. ISBN 9781615208074 (doi: 10.4018/978-1-61520-807-4.ch008)

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Publisher's URL: http://dx.doi.org/10.4018/978-1-61520-807-4.ch008

Abstract

With the increase in SoC complexity sand CMOS technology capabilities, the SoC design community has recently observed a convergence of a number of critical trends, all of them aimed at addressing the design gap: the advent of heterogeneous multi-core SoCs and Networks-on-Chip and the recognition of the need for design reuse through IP cores, for dynamic reconfigurability and for high abstraction-level design. In this chapter, we present a solution for High-level Programming of Dynamically Reconfigurable NoC-based Heterogeneous Multicore SoCs. Our solution, the Gannet framework, allows IP core-based Heterogeneous Multicore SoCs to be programmed using a high-level language whilst preserving the full potential for parallelism and dynamic reconfigurability inherent in such a system. The required hardware infrastructure is small and low-latency, thus adding full dynamic reconfiguration capabilities with a small overhead both in area and performance.

Item Type:Book Sections
Status:Published
Glasgow Author(s) Enlighten ID:Vanderbauwhede, Professor Wim
Authors: Vanderbauwhede, W.
Subjects:Q Science > QA Mathematics > QA75 Electronic computers. Computer science
College/School:College of Science and Engineering > School of Computing Science
Publisher:Information Science Reference
ISBN:9781615208074

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Project CodeAward NoProject NamePrincipal InvestigatorFunder's NameFunder RefLead Dept
389341A novel service-based system on a chip architecture using on chip networks with smart packets and dynamically reconfigurable logicWim VanderbauwhedeEngineering & Physical Sciences Research Council (EPSRC)GR/T03239/01Computing Science