Performance modeling of fault-tolerant circuit-switched communication networks

Safaei, F., Khonsari, A., Fathy, M., Alzeidi, N. and Ould-Khaoua, M. (2006) Performance modeling of fault-tolerant circuit-switched communication networks. In: International Symposium on Parallel Computing in Electrical Engineering 2006, (PARELEC 2006), Bialystok, Poland, 13-17 September 2006, pp. 239-244. ISBN 0769525547 (doi: 10.1109/PARELEC.2006.67)

Abstract

Circuit switching (CS) has been suggested as an efficient switching method for supporting simultaneous communications (such as data, voice, and images) across parallel systems due to its ability to preserve both communication performance and fault-tolerant demands in such systems. In this paper we present an efficient scheme to capture the mean message latency in 2D torus with CS in the presence of faulty components. We have also conducted extensive simulation experiments, the results of which are used to validate the analytical model

• Item Type: Conference Proceedings
• Status: Published
• Refereed: Yes
• Glasgow Author(s) Enlighten ID: Ould-Khaoua, Dr Mohamed and Alzeidi, Mr Nasser
• Authors: Safaei, F., Khonsari, A., Fathy, M., Alzeidi, N., and Ould-Khaoua, M.
• Subjects: Q Science > QA Mathematics > QA75 Electronic computers. Computer science
• College/School: College of Science and Engineering > School of Computing Science
• Publisher: IEEE Computer Society
• ISBN: 0769525547
• Copyright Holders: Copyright © 2006 IEEE
• First Published: First published in International Symposium on Parallel Computing in Electrical Engineering 2006, (PARELEC 2006)
• Publisher Policy: Reproduced in accordance with the copyright policy of the publisher.