Fabrication of 22 nm T-gates for HEMT applications

Bentley, S., Li, X. , Moran, D. A. J. and Thayne, I. G. (2008) Fabrication of 22 nm T-gates for HEMT applications. Microelectronic Engineering, 85(5-6), pp. 1375-1378. (doi: 10.1016/j.mee.2008.01.058)

Full text not currently available from Enlighten.


This paper reports a new method for the fabrication of sub-25 nm T-gates for high electron mobility transistors (HEMTs). For robust fabrication, it may be advantageous to employ a two-step process where the gate foot and head can be separately defined. The new process uses ZEP520A electron beam resist as a mask for SF6-based anisotropic reactive ion etching of ICP-deposited silicon nitride to define the gate foot. The gate head structure, defined in PMMA/LOR/UVIII, is then lithographically aligned to the gate foot. All electron beam lithography was performed using a Vistec VB6 UHR EWF tool. The design flexibility, mechanical stability, gate resistance and plasma-induced damage of this new method and its suitability for integration in a HEMT process flow are evaluated in this paper. This work has led to the high-yield fabrication of robust 22 nm T-gates.

Item Type:Articles
Additional Information:33rd International Conference on Micro- and Nano-Engineering Copenhagen, DENMARK, SEP 23-26, 2007
Glasgow Author(s) Enlighten ID:Thayne, Professor Iain and Bentley, Dr Steven and Moran, Professor David and Li, Dr Xu
Authors: Bentley, S., Li, X., Moran, D. A. J., and Thayne, I. G.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
Journal Name:Microelectronic Engineering

University Staff: Request a correction | Enlighten Editors: Update this record