Ali, Z., Paliwal, P., Ahmad, M., Heidari, H. and Gupta, S. (2024) Fast settling phase-locked loops: a comprehensive survey of applications and techniques. IEEE Circuits and Systems Magazine, (Accepted for Publication)
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323697.pdf - Accepted Version Restricted to Repository staff only 30MB |
| Item Type: | Articles |
|---|---|
| Additional Information: | This work was supported in part by Qualcomm donation through the student scholarship and in part by UKRI Innovate UK Altnaharra: Cryo electronics for Quantum Circuits project (grant no. 10006186), UKRI Innovate UK Cryo-CMOS to enable scalable quantum computers project (grant no. 10006017), and EPSRC EPIQC: Empowering Practical Interfacing of Quantum Computing, UK (grant no: EP/W032627/1). |
| Keywords: | Gear-shift mechanism, jitter phase, locked loop, quantum, radar, settling time, tuning range, digital PLL, sub-sampling PLL, bang-bang PLL |
| Status: | Accepted for Publication |
| Refereed: | Yes |
| Glasgow Author(s) Enlighten ID: | Ali, Mr Zeeshan and Ahmad, Mr Meraj and Heidari, Professor Hadi |
| Authors: | Ali, Z., Paliwal, P., Ahmad, M., Heidari, H., and Gupta, S. |
| College/School: | College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering |
| Journal Name: | IEEE Circuits and Systems Magazine |
| Publisher: | IEEE |
| ISSN: | 1531-636X |
| ISSN (Online): | 1558-0830 |
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