Hardware implementation of overlap-save-based fading channel emulator

Najam-Ul-Islam, M., Nauman, M., Jafri, A. , Nadal, J., Abdel Nour, C. and Baghdadi, A. (2021) Hardware implementation of overlap-save-based fading channel emulator. IEEE Transactions on Circuits and Systems II: Express Briefs, 68(3), pp. 918-922. (doi: 10.1109/tcsii.2020.3020724)

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Abstract

An efficient hardware implementation of correlated Rayleigh fading channel simulator is presented in this brief. It emulates Doppler effects based on the use of Overlap-Save (OLS) method. OLS is used for both, the fading variates generator and the time domain interpolator, leading to a scalable complete solution. Moreover, additional simplifications were introduced to reduce even further algorithmic complexity when compared with the original OLS-based proposal. An efficient hardware implementation is achieved through maximizing the utilization rate of allocated hardware resources. When added to its scalability, this makes the proposal appealing to emulate channels with multipath effects for MIMO systems. Indeed, the proposed parallel architecture enables a throughput of 34 Mega Samples per Second per path at a clock frequency of 275 MHz on Xilinx Virtex-7 FPGA. The achieved throughput allows the support of the most demanding LTE configuration with 20 MHz channel bandwidth. To the best of our knowledge, this is the first ever real-time hardware implementation of OLS-based channel emulator.

Item Type:Articles
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Jafri, Dr Atif
Authors: Najam-Ul-Islam, M., Nauman, M., Jafri, A., Nadal, J., Abdel Nour, C., and Baghdadi, A.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
Journal Name:IEEE Transactions on Circuits and Systems II: Express Briefs
Publisher:IEEE
ISSN:1549-7747
ISSN (Online):1558-3791
Published Online:01 September 2020

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