A low-complexity Edward-Curve point multiplication architecture

Sajid, A., Rashid, M., Imran, M. and Jafri, A. (2021) A low-complexity Edward-Curve point multiplication architecture. Electronics, 10(9), 1080. (doi: 10.3390/electronics10091080)

[img] Text
309421.pdf - Published Version
Available under License Creative Commons Attribution.

1MB

Abstract

The Binary Edwards Curves (BEC) are becoming more and more important, as compared to other forms of elliptic curves, thanks to their faster operations and resistance against side channel attacks. This work provides a low-complexity architecture for point multiplication computations using BEC over GF(2 233). There are three major contributions in this article. The first contribution is the reduction of instruction-level complexity for unified point addition and point doubling laws by eliminating multiple operations in a single instruction format. The second contribution is the optimization of hardware resources by minimizing the number of required storage elements. Finally, the third contribution is to reduce the number of required clock cycles by incorporating a 32-bit finite field digit-parallel multiplier in the datapath. As a result, the achieved throughput over area ratio over GF(2 233) on Virtex-4, Virtex-5, Virtex-6 and Virtex-7 Xilinx FPGA (Field Programmable Gate Array) devices are 2.29, 19.49, 21.5 and 20.82, respectively. Furthermore, on the Virtex-7 device, the required computation time for one point multiplication operation is 18 µs, while the power consumption is 266 mW. This reveals that the proposed architecture is best suited for those applications where the optimization of both area and throughput parameters are required at the same time.

Item Type:Articles
Additional Information:Funding: The authors would like to thank the Deanship of Scientific Research at Umm Al-Qura University for supporting this work by Grant code: (20UQU0053DSR).
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Jafri, Dr Atif
Authors: Sajid, A., Rashid, M., Imran, M., and Jafri, A.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
Journal Name:Electronics
Publisher:MDPI
ISSN:2079-9292
ISSN (Online):2079-9292
Published Online:03 May 2021
First Published:First published in Electronics 10(9):1080
Publisher Policy:Reproduced under a Creative Commons license

University Staff: Request a correction | Enlighten Editors: Update this record