Nonequilibrium hole transport in deep sub-micron well-tempered Si p-MOSFETs

Watling, J.R., Zhao, Y.P., Asenov, A. and Barker, J.R. (2000) Nonequilibrium hole transport in deep sub-micron well-tempered Si p-MOSFETs. In: 7th International Workshop on Computational Electronics, Glasgow, UK, 22-25 May 2000, pp. 66-67. ISBN 0852617046 (doi: 10.1109/IWCE.2000.869925)

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Publisher's URL: http://dx.doi.org/10.1109/IWCE.2000.869925

Abstract

Using 2D full-band MC simulations the authors study nonequilibrium transport effects and the performance potential of well tempered Si p-channel MOSFETs covering gate lengths ranging from 90nm to 25nm. By comparing MC simulations with carefully calibrated drift diffusion (DD) simulations of the same devices, they provide a quantitative estimate of the importance and the influence of nonequilibrium transport on the device performance.

Item Type:Conference Proceedings
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Watling, Dr Jeremy and Asenov, Professor Asen
Authors: Watling, J.R., Zhao, Y.P., Asenov, A., and Barker, J.R.
Subjects:T Technology > TK Electrical engineering. Electronics Nuclear engineering
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
Research Group:Device Modelling Group
Publisher:Institute of Electrical and Electronics Engineers
ISBN:0852617046
Copyright Holders:Copyright © 2000 Institute of Electrical and Electronics Engineers
First Published:First published in 7th International Workshop on Computational Electronics (2000):66-67
Publisher Policy:Reproduced in accordance with the copyright policy of the publisher

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