Scaling study of Si/SiGe MODFETs for RF applications

Yang, L., Watling, J.R., Wilkins, R.C.W., Asenov, A., Barker, J.R., Roy, S. and Hackbarth, T. (2002) Scaling study of Si/SiGe MODFETs for RF applications. In: 10th IEEE International Symposium on Electron Devices for Microwave and Optoelectronic Applications (EDMO), Manchester, UK, 18-19 November 2002, pp. 101-106. ISBN 0780375300

Abstract

Based on the successful calibration on a 0.25 /spl mu/m strained Si/SiGe n-type MODFET, this paper presents a gate length scaling study of double-side doped Si/SiGe MODFETs. Our simulations show that gate length scaling improves device RF performance. However, the short channel effects (SCE) along with the parasitic delays limit the device performance improvements. We find that it is necessary to consider scaling (dimensions and doping) of both the lateral and vertical architecture in order to optimize the device design.

• Item Type: Conference Proceedings
• Status: Published
• Refereed: Yes
• Glasgow Author(s) Enlighten ID: Asenov, Professor Asen and Watling, Dr Jeremy and Roy, Professor Scott
• Authors: Yang, L., Watling, J.R., Wilkins, R.C.W., Asenov, A., Barker, J.R., Roy, S., and Hackbarth, T.
• Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering
• College/School: College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
• Research Group: Device Modelling Group
• Publisher: Institute of Electrical and Electronics Engineers
• ISBN: 0780375300
• Copyright Holders: Copyright © 2002 Institute of Electrical and Electronics Engineers
• First Published: First published in 10th IEEE International Symposium on Electron Devices for Microwave and Optoelectronic Applications (2002):101-106
• Publisher Policy: Reproduced in accordance with the copyright policy of the publisher