Overlapped gate-source/drain H-shaped TFET: proposal, design and linearity analysis

Upadhyay, U., Raman, A., Ranjan, R. and Kumar, N. (2022) Overlapped gate-source/drain H-shaped TFET: proposal, design and linearity analysis. Silicon, 14(11), pp. 6415-6424. (doi: 10.1007/s12633-021-01404-w)

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In this paper, the proposed design of H-shaped TFET has been discussed. This design is providing a high Ion/Ioff ratio with a better Ion. HfO2 is used for better tunnelling current. The controllability of gate voltage on the drain current improves as the gate area increases. We can obtain better outcomes for current in this design by altering the architecture. With this device, Different parameters such as unit parameter, analog parameter, and linearity parameter have been studied and investigated the output of the H-TFET. As unit parameters, the electric field, electric potential, energy band diagram, and non-local band-to-band tunnelling rate (BTBT) have all been observed. Second and third-order harmonics distortion (HD2, HD3), third-order current intercept point (IIP3), third-order intermodulation distortions (IMD3), and second and third-order voltage intercept point (VIP2, VIP3) are evaluated as linearity parameters that characterize the device’s distortions and linearity. We obtained Ion=1.6x10−4 A/μm,Ioff=2.1x10−19 A/μm, Ion/Ioff=7.6x1014,threshold voltage Vt=0.3449 V.

Item Type:Articles
Glasgow Author(s) Enlighten ID:Kumar, Dr Naveen
Authors: Upadhyay, U., Raman, A., Ranjan, R., and Kumar, N.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
Journal Name:Silicon
ISSN (Online):1876-9918
Published Online:05 October 2021

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