Gupta, A. K., Raman, A. and Kumar, N. (2022) Design considerations and optimization of electrostatic doped ferroelectric nanotube tunnel FET: analog and noise analysis. Silicon, 14(16), pp. 10357-10373. (doi: 10.1007/s12633-022-01720-9)
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Abstract
This paper proposed the electrostatically doped Ferroelectric Nanotube Tunnel FET (FE-NT-TFET). The proposed device is electrostatically doped, so the applied source voltage is -1.2 V (VS = -1.2 V). Device variables like potential variation, electric-field energy, non-local band to band electron tunnel (BTBT) rates, electron carrier concentration, and hole carrier concentration have been investigating. Analog variables like drain current (IDS), ION/IOFF current ratio, ON current (ION), sub-threshold slope (SS), OFF current (IOFF), a threshold voltage (VTH), and average sub-threshold slope (AVSS) have been discussed. The noise parameter such as real impedance (Z0), minimum noise figure (NF), auto/cross-correlation function (ACF & CCF) has been discussed. To obtain the steep sub-threshold slope (SS) and higher drain current (IDS) ferroelectric material is used in the place of the gate oxide. Ferroelectric material HfO2 is used in the proposed FE-NT-TFET device. HfO2 is used because of compatibility with the CMOS flow. The proposed FE-NT-TFET device shows the higher current 62.4uA/um for VDS = 1.2 V and steep sub-threshold slope (SS) 7 mV/decade. The proposed device shows the average sub-threshold slope (AVSS) 22.9 mV/decade. The proposed FE-NT-TFET device shows the lower OFF current (IOFF) order of 10−19A/um and higher ION/IOFF current order of 1013.
Item Type: | Articles |
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Status: | Published |
Refereed: | Yes |
Glasgow Author(s) Enlighten ID: | Kumar, Dr Naveen |
Authors: | Gupta, A. K., Raman, A., and Kumar, N. |
College/School: | College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering |
Journal Name: | Silicon |
Publisher: | Springer |
ISSN: | 1876-990X |
ISSN (Online): | 1876-9918 |
Published Online: | 03 March 2022 |
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