Doping-less TFET based common source amplifier implementation and behaviour analysis under symmetric and asymmetric conditions

Bhardwaj, A., Solay, L. R., Kumar, N. , Amin, S. I., Singh, A., Raj, B., Kumar, P. and Anand, S. (2022) Doping-less TFET based common source amplifier implementation and behaviour analysis under symmetric and asymmetric conditions. Silicon, 14(18), pp. 12251-12260. (doi: 10.1007/s12633-022-01921-2)

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Abstract

In this paper a detailed investigation is carried out upon doping less tunnel field effect transistor (DLTFET) under symmetric and asymmetric conditions. For this purpose, a range for back gate metal work function (ɸBG) from 4.1 eV to 4.8 eV and the back gate oxide thickness (tox) from 3 to 6 nm have been considered by keeping the front gate work function (ɸFG) fixed with 4.5 eV and EOT (Equivalent oxide thickness) of 0.8 nm respectively. Analysis with respect to analog parameters such as transconductance (gm), total gate capacitance (Cgg) and cut-off frequency (fT) has been made and compared with the range of symmetric and asymmetric conditions. It is observed from simulation results that the DLTFET has an optimum performance at ɸBG of 4.5 eV and tox of 0.8 nm EOT. Later the device is then utilised to implement common source amplifier circuit. A range of variations with respect to load resistor (RL) and drain resistor (RD) were made to check for the circuit’s performance at gain’s perspective.

Item Type:Articles
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Kumar, Dr Naveen
Authors: Bhardwaj, A., Solay, L. R., Kumar, N., Amin, S. I., Singh, A., Raj, B., Kumar, P., and Anand, S.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
Journal Name:Silicon
Publisher:Springer
ISSN:1876-990X
ISSN (Online):1876-9918
Published Online:12 May 2022

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