SECDA-TFLite: a toolkit for efficient development of FPGA-based DNN accelerators for edge inference

Haris, J., Gibson, P., Cano, J. , Bohm Agostini, N. and Kaeli, D. (2023) SECDA-TFLite: a toolkit for efficient development of FPGA-based DNN accelerators for edge inference. Journal of Parallel and Distributed Computing, 173, pp. 140-151. (doi: 10.1016/j.jpdc.2022.11.005)

Abstract

In this paper we propose SECDA-TFLite, a new open source toolkit for developing DNN hardware accelerators, integrated within the TFLite framework. The toolkit leverages the principles of SECDA, a hardware/software co-design methodology, to reduce the design time of optimized DNN inference accelerators on edge devices with FPGAs. With SECDA-TFLite, we reduce the initial setup costs associated with integrating a new accelerator design within a target DNN framework, allowing developers to focus on the design. SECDA-TFLite also includes modules for cost-effective SystemC simulation, profiling, and AXI-based data communication. As a case study, we use SECDA-TFLite to develop and evaluate three accelerator designs across seven common CNN models and two BERT-based models against an ARM A9 CPU-only baseline, achieving an average performance speedup across models of up to 3.4× for the CNN models and of up to 2.5× for the BERT-based models. Our code is available at https://github.com/gicLAB/SECDA-TFLite.

• Item Type: Articles
• Status: Published
• Refereed: Yes
• Glasgow Author(s) Enlighten ID: Cano Reyes, Dr Jose and Gibson, Perry and Haris, Mr Jude
• Authors: Haris, J., Gibson, P., Cano, J., Bohm Agostini, N., and Kaeli, D.
• College/School: College of Science and Engineering > School of Computing Science
• Journal Name: Journal of Parallel and Distributed Computing
• Publisher: Elsevier
• ISSN: 0743-7315
• ISSN (Online): 1096-0848
• Published Online: 15 November 2022
• Copyright Holders: Copyright © 2022 The Authors
• First Published: First published in Journal of Parallel and Distributed Computing 173: 140-151
• Publisher Policy: Reproduced under a Creative Commons License

Project Code	Award No	Project Name	Principal Investigator	Funder's Name	Funder Ref	Lead Dept
305200		DTP 2018-19 University of Glasgow	Mary Beth Kneafsey	Engineering and Physical Sciences Research Council (EPSRC)	EP/R513222/1	MVLS - Graduate School