Investigation of plasma induced etch damage/changes in AlGaN/GaN HEMTs

Ofiare, A., Taking, S., Karami, K. , Dhongde, A., Al-Khalidi, A. and Wasige, E. (2021) Investigation of plasma induced etch damage/changes in AlGaN/GaN HEMTs. International Journal of Nanoelectronics and Materials, 14, pp. 29-36.

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Publisher's URL: https://ijneam.unimap.edu.my/images/PDF/InCAPE2021/Vol_14_SI_Dec_2021_29-36.pdf

Abstract

In this work, we report on the processing and device characteristics of AlGaN/GaN HEMT devices to investigate the effects of silicon dioxide (SiO2) etching using Fluoroform (CHF3) gas prior to gate metal deposition. Three different GaN device structures were fabricated: (a) device #1 in which the device passivation (using SiO2) and gate metallisation are done in one lithography step, (b) device #2 in which the device passivation and gate metallization are done in 2 separate steps, (c) device #3, in which the gate metallization is deposited prior to passivation. 100 nm of plasma enhanced chemical vapor deposition (PECVD) SiO2 was deposited for surface passivation to the devices. As fabricated, devices #1 and #2 exhibited very poor device characteristics with very low output currents which we attribute to surface plasma induced damage or changes on the gate region after the SiO2 etching. A two-step post gate annealing step was performed on the devices to recover this damage. The highest maximum drain current of over 1100 mA/mm was observed on device #3 after the first anneal step compared to other devices which showed higher maximum drain current after the second anneal step. All three devices show an improvement in self-heating behavior after the second anneal step along with more stable transfer characteristics. The highest maximum peak transconductance of over 250 mS/mm was observed on devices #2 and #3 after the first anneal step. This reduces slightly for all devices but with more stable characteristics. The measured threshold voltage values (VTH) are also consistent and stable after performing the second anneal step. These results indicate that avoiding exposing the active region of GaN devices is important in achieving expected and stable characteristics. It also observed that further device improvement can be done by performing a two-step post gate annealing process.

Item Type:Articles
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Wasige, Professor Edward and Dhongde, Aniket and Al-Khalidi, Dr Abdullah and Karami, Mr Kaivan and Taking, Dr Sanna and Ofiare, Dr Afesomeh
Authors: Ofiare, A., Taking, S., Karami, K., Dhongde, A., Al-Khalidi, A., and Wasige, E.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
Journal Name:International Journal of Nanoelectronics and Materials
Publisher:Universiti Malaysia Perlis (UniMAP)
ISSN:1985-5761
ISSN (Online):1997-4434

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Project CodeAward NoProject NamePrincipal InvestigatorFunder's NameFunder RefLead Dept
303977ChipAIEdward WasigeEuropean Commission (EC)828841ENG - Electronics & Nanoscale Engineering