A Priority-Aware Multiqueue NIC Design for Real-Time IoT Devices

Behnke, I., Wiesner, P., Danicki, R. and Thamsen, L. (2022) A Priority-Aware Multiqueue NIC Design for Real-Time IoT Devices. In: 37th ACM/SIGAPP Symposium on Applied Computing (SAC), Virtual Event, 25 - 29 April 2022, pp. 534-538. ISBN 9781450387132 (doi: 10.1145/3477314.3507165)

Abstract

Low-level embedded systems are used to control cyber-phyiscal systems in industrial and autonomous applications. They need to meet hard real-time requirements as unanticipated controller delays on moving machines can have devastating effects. Modern developments such as the industrial Internet of Things and autonomous machines require these devices to connect to large IP networks. Since Network Interface Controllers (NICs) trigger interrupts for incoming packets, real-time embedded systems are subject to unpredictable preemptions when connected to such networks. In this work, we propose a priority-aware NIC design to moderate network-generated interrupts by mapping IP flows to processes and based on that, consolidates their packets into different queues. These queues apply priority-dependent interrupt moderation.First experimental evaluations show that 93 % of interrupts can be saved leading to an 80 % decrease of processing delay of critical tasks in the configurations investigated.

• Item Type: Conference Proceedings
• Status: Published
• Refereed: Yes
• Glasgow Author(s) Enlighten ID: Thamsen, Dr Lauritz
• Authors: Behnke, I., Wiesner, P., Danicki, R., and Thamsen, L.
• College/School: College of Science and Engineering > School of Computing Science
• ISBN: 9781450387132
• Published Online: 06 May 2022
• Copyright Holders: Copyright © 2022 Copyright held by the owner/author(s)
• Publisher Policy: Reproduced in accordance with the publisher copyright policy

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