Nabi, S. W. and Vanderbauwhede, W. (2019) Automatic pipelining and vectorization of scientific code for FPGAs. International Journal of Reconfigurable Computing, 2019, 7348013. (doi: 10.1155/2019/7348013)
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Abstract
There is a large body of legacy scientific code in use today that could benefit from execution on accelerator devices like GPUs and FPGAs. Manual translation of such legacy code into device-specific parallel code requires significant manual effort and is a major obstacle to wider FPGA adoption. We are developing an automated optimizing compiler TyTra to overcome this obstacle. The TyTra flow aims to compile legacy Fortran code automatically for FPGA-based acceleration, while applying suitable optimizations. We present the flow with a focus on two key optimizations, automatic pipelining and vectorization. Our compiler frontend extracts patterns from legacy Fortran code that can be pipelined and vectorized. The backend first creates fine and coarse-grained pipelines and then automatically vectorizes both the memory access and the datapath based on a cost model, generating an OpenCL-HDL hybrid working solution for FPGA targets on the Amazon cloud. Our results show up to 4.2× performance improvement over baseline OpenCL code.
Item Type: | Articles |
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Status: | Published |
Refereed: | Yes |
Glasgow Author(s) Enlighten ID: | Vanderbauwhede, Professor Wim and Nabi, Dr Syed Waqar |
Authors: | Nabi, S. W., and Vanderbauwhede, W. |
College/School: | College of Science and Engineering > School of Computing Science |
Journal Name: | International Journal of Reconfigurable Computing |
Publisher: | Hindawi |
ISSN: | 1687-7195 |
ISSN (Online): | 1687-7209 |
Copyright Holders: | Copyright © 2019 Syed Waqar Nabi and Wim Vanderbauwhede |
First Published: | First published in International Journal of Reconfigurable Computing 2019:7348013 |
Publisher Policy: | Reproduced under a Creative Commons License |
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