Sengupta, A. and Sarkar, C. K. (2014) Study on nanoparticles embedded multilayer gate dielectric MOS non-volatile memory devices. International Journal of Nanotechnology, 11(12), p. 1073. (doi: 10.1504/ijnt.2014.065133)
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Abstract
Here, we present a computational study on stacked multilayer nanoparticles embedded gate dielectric MOS non-volatile memory devices. Two device structures, one with a pure SiO2 tunnel oxide and other with a stacked HfO2-SiO2 tunnel oxide were compared. The Au nanocrystals were assumed embedded in a Si3N4 layer. The electrical parameters of the composite multilayer were evaluated using Maxwell-Garnett theory and virtual crystal approximation. From the WKB approximation, the direct and the Fowler-Nordheim tunnelling currents were evaluated, and subsequently the I-V characteristics and the flatband voltage shifts were also simulated. The flatband shift simulations were compared with recent experimental results.
| Item Type: | Articles |
|---|---|
| Status: | Published |
| Refereed: | No |
| Glasgow Author(s) Enlighten ID: | Sengupta, Dr Amretashis |
| Authors: | Sengupta, A., and Sarkar, C. K. |
| College/School: | College of Science and Engineering > School of Engineering > Systems Power and Energy |
| Journal Name: | International Journal of Nanotechnology |
| Publisher: | Inderscience |
| ISSN: | 1475-7435 |
| ISSN (Online): | 1741-8151 |
| Published Online: | 14 October 2014 |
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