Accarino, C., Al-Rawhani, M., Shah, Y. D. , Maneuski, D. , Mitra, S., Buttar, C. and Cumming, D. R.S. (2018) Low Noise and High Photodetection Probability SPAD in 180 nm Standard CMOS Technology. In: IEEE International Symposium on Circuits and Systems (ISCAS 2018), Florence, Italy, 27-30 May 2018, ISBN 9781538648810 (doi: 10.1109/ISCAS.2018.8351173)
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Abstract
A square shaped, low noise and high photo-response single photon avalanche diode suitable for circuit integration, implemented in a standard CMOS 180 nm high voltage technology, is presented. In this work, a p+ to shallow n-well junction was engineered with a very smooth electric field profile guard ring to attain a photo detection probability peak higher than 50% with a median dark count rate lower than 2 Hz/μm2 when operated at an excess bias of 4 V. The reported timing jitter full width at half maximum is below 300 ps for 640 nm laser pulses.
| Item Type: | Conference Proceedings |
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| Status: | Published |
| Refereed: | Yes |
| Glasgow Author(s) Enlighten ID: | Mitra, Dr Srinjoy and Buttar, Professor Craig and Al-Rawhani, Dr Mohammed and Accarino, Claudio and Maneuski, Dr Dima and Cumming, Professor David and Shah, Dr Yash Diptesh |
| Authors: | Accarino, C., Al-Rawhani, M., Shah, Y. D., Maneuski, D., Mitra, S., Buttar, C., and Cumming, D. R.S. |
| College/School: | College of Science and Engineering > School of Engineering College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering College of Science and Engineering > School of Physics and Astronomy |
| ISBN: | 9781538648810 |
| Copyright Holders: | Copyright © 2018 IEEE |
| Publisher Policy: | Reproduced in accordance with the copyright policy of the publisher |
| Related URLs: | |
| Data DOI: | 10.5525/gla.researchdata.493 |
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