A review of the Z²-FET 1T-DRAM memory: operation mechanisms and key parameters

Cristoloveanu, S. et al. (2018) A review of the Z²-FET 1T-DRAM memory: operation mechanisms and key parameters. Solid-State Electronics, 143, pp. 10-19. (doi: 10.1016/j.sse.2017.11.012)

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The band-modulation and sharp-switching mechanisms in Z²-FET device operated as a capacitorless 1T-DRAM memory are reviewed. The main parameters that govern the memory performance are discussed based on detailed experiments and simulations. This 1T-DRAM memory does not suffer from super-coupling effect and can be integrated in sub-10 nm thick SOI films. It offers low leakage current, high current margin, long retention, low operating voltage especially for programming, and high speed. The Z²-FET is suitable for embedded memory applications.

Item Type:Articles
Additional Information:This work is being supported by the European project REMINDER.
Glasgow Author(s) Enlighten ID:Asenov, Professor Asen and Duan, Dr Meng and Cheng, Dr Binjie and Adamu-Lema, Dr Fikru
Authors: Cristoloveanu, S., Lee, K.H., Parihar, M.S., El Dirani, H., Lacord, J., Martinie, S., Le Royer, C., Barbe, J.-C., Mescot, X., Fonteneau, P., Galy, P., Gamiz, F., Navarro, C., Cheng, B., Duan, M., Adamu-Lema, F., Asenov, A., Taur, Y., Xu, Y., Kim, Y.-T., Wan, J., and Bawedin, M.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
Journal Name:Solid-State Electronics
ISSN (Online):1879-2405
Published Online:02 December 2017
Copyright Holders:Copyright © 2017 Elsevier Ltd.
First Published:First published in Solid-State Electronics 143:10-19
Publisher Policy:Reproduced in accordance with the publisher copyright policy

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Project CodeAward NoProject NamePrincipal InvestigatorFunder's NameFunder RefLead Dept
702351REMINDERAsen AsenovEuropean Commission (EC)687931ENG - ENGINEERING ELECTRONICS & NANO ENG