Waghmare, P. C., Patil, S. B. , Dusane, R. O. and Rao, V.R. (2002) Improvement in Gate Dielectric Quality of Ultra Thin a: SiN:H MNS Capacitor by Hydrogen Etching of the Substrate. In: Materials Research Society Spring Meeting: Symposium B – Silicon Materials-Processing, Characterization, and Reliability, San Francisco, CA, USA, 1-5 Apr 2002, B4.*. (doi: 10.1557/PROC-716-B4.8)
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Abstract
To extend the scaling limit of thermal SiO2, in the ultra thin regime when the direct tunneling current becomes significant, members of our group embarked on a program to explore the potential of silicon nitride as an alternative gate dielectric. Silicon nitride can be deposited using several CVD methods and its properties significantly depend on the method of deposition. Although these CVD methods can give good physical properties, the electrical properties of devices made with CVD silicon nitride show very poor performance related to very poor interface, poor stability, presence of large quantity of bulk traps and high gate leakage current. We have employed the rather newly developed Hot Wire Chemical Vapor Deposition (HWCVD) technique to develop the a:SiN:H material. From the results of large number of optimization experiments we propose the atomic hydrogen of the substrate surface prior to deposition to improve the quality of gate dielectric. Our preliminary results of these efforts show a five times improvement in the fixed charges and interface state density.
Item Type: | Conference Proceedings |
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Status: | Published |
Refereed: | Yes |
Glasgow Author(s) Enlighten ID: | Patil, Dr Samadhan |
Authors: | Waghmare, P. C., Patil, S. B., Dusane, R. O., and Rao, V.R. |
College/School: | College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering |
Journal Name: | MRS Proceedings |
ISSN: | 1946-4274 |
Published Online: | 02 February 2011 |
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