High Performance Enhancement Mode III-V MOSFETs for Silicon Co-Integration

Thayne, I. G. et al. (2007) High Performance Enhancement Mode III-V MOSFETs for Silicon Co-Integration. In: Silicon Nanoelectronics Workshop, Kyoto, Japan, 10-11 June 2007,

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Item Type:Conference Proceedings
Glasgow Author(s) Enlighten ID:Li, Dr Xu and Zhou, Dr Haiping and Macintyre, Dr Douglas and Thayne, Prof Iain and Thoms, Dr Stephen and Asenov, Professor Asen and Hill, Mr Richard and Stanley, Professor Colin and Kalna, Dr Karol and Moran, Professor David
Authors: Thayne, I. G., Asenov, A., Hill, R. J. W., Holland, M. C., Kalna, K., Li, X., Macintyre, D., Moran, D. A. J., Stanley, C. R., Thoms, S., Zhou, H., Abrokwah, J., Droopad, R., Rajagopalan, K., Zurcher, P., and Passlack, M.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering

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