Hierarchical Variability-Aware Compact Models of 20nm Bulk CMOS

Wang, X., Reid, D., Wang, L., Burenkov, A., Millar, C., Lorenz, J. and Asenov, A. (2015) Hierarchical Variability-Aware Compact Models of 20nm Bulk CMOS. In: 20th International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Washington D.C.,USA, 09-11 Sep 2015, pp. 325-328. ISBN 9781467378598

Full text not currently available from Enlighten.

Abstract

No abstract available.

Item Type:Conference Proceedings
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Wang, Dr Xingsheng and Asenov, Professor Asen and Millar, Mr Cameron and Wang, Dr Liping
Authors: Wang, X., Reid, D., Wang, L., Burenkov, A., Millar, C., Lorenz, J., and Asenov, A.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
ISBN:9781467378598

University Staff: Request a correction | Enlighten Editors: Update this record