An analytical comparison of the spidergon and rectangular mesh NoCs

Moadeli, M., Shahrabi, A., Vanderbauwhede, W. and Ould-Khaoua, M. (2009) An analytical comparison of the spidergon and rectangular mesh NoCs. Journal of Interconnection Networks, 10(01n02), pp. 167-188. (doi:10.1142/S0219265909002492)

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Networks on chip (NoC) emerged as a structured and scalable communication medium for development of future Systems-on-Chip (SoC). Due to its unique features in terms of scalability and ease of synthesis, the (rectangular) mesh topology is regarded as an appropriate candidate for on-chip network development. On the other hand, the Spidergon NoC has been proposed as an alternative topology to realize cost effective multi-processor SoC (MPSoC) development. This paper presents analytical models of the average message latency and network throughput for both rectangular mesh and the Spidergon NoC employing wormhole switching. For each model, the validity of the analysis is verified by comparing the analytical model against the results produced by a discrete event simulator. Using the developed models, we then compare these topologies from different perspectives including manufacturing issues, message latency and network throughput.

Item Type:Articles
Glasgow Author(s) Enlighten ID:Vanderbauwhede, Professor Wim and Moadeli, Mr Mahmoud and Ould-Khaoua, Dr Mohamed
Authors: Moadeli, M., Shahrabi, A., Vanderbauwhede, W., and Ould-Khaoua, M.
College/School:College of Science and Engineering > School of Computing Science
Journal Name:Journal of Interconnection Networks
Publisher:World Scientific Publishing
ISSN (Online):1793-6713

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Project CodeAward NoProject NamePrincipal InvestigatorFunder's NameFunder RefLead Dept
389341A novel service-based system on a chip architecture using on chip networks with smart packets and dynamically reconfigurable logicWim VanderbauwhedeEngineering & Physical Sciences Research Council (EPSRC)GR/T03239/01COM - COMPUTING SCIENCE