General parallel structure digital repetitive control

Lu, W., Zhou, K. and Wang, D. (2013) General parallel structure digital repetitive control. International Journal of Control, 86(1), pp. 70-83. (doi: 10.1080/00207179.2012.718798)

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This article presents a parallel structure digital repetitive control (PSDRC) scheme, where the internal models of all harmonics are decomposed into multiple parallel connected groups. Compared with conventional repetitive controller, the proposed parallel structure enables repetitive controller to regulate the error convergence rate at each group of harmonic frequencies independently and offers faster total error convergence rate. Moreover, PSDRC can achieve zero-error tracking or perfect disturbance rejection for all harmonics without occupying more data memory. A stability criterion with rigorous proof for PSDRC system is addressed, which is compatible with those existing stability criteria for existing RC schemes. An application example of three-phase pulse-width modulation inverter is provided to demonstrate the effectiveness of the proposed PSDRC scheme.

Item Type:Articles
Keywords:Repetitive Control
Glasgow Author(s) Enlighten ID:Zhou, Dr Keliang
Authors: Lu, W., Zhou, K., and Wang, D.
Subjects:T Technology > TK Electrical engineering. Electronics Nuclear engineering
College/School:College of Science and Engineering > School of Engineering
Research Group:System Power and Energy
Journal Name:International Journal of Control
Publisher:Taylor and Francis
ISSN (Online):1366-5820

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