Graph reversal and the design of parallel control and signal processing architectures

Li, Y. and Rogers, E. (1995) Graph reversal and the design of parallel control and signal processing architectures. International Journal of Control, 62(2), pp. 271-287. (doi: 10.1080/00207179508921543)

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Abstract

A multiple-input/multiple-output graph reversal technique is developed and applied to the design of parallel control (and signal processing) architectures using systolic arrays as a design example. Using this method, it is possible to develop novel architectures with, in feedback control applications, the essential property of short latency. Further, it can also be used to expand existing architectures at both array and cell levels. A systematic method for verifying the transfer function (or transfer-function matrix in the multivariable case) which is easy to use and requires no manual iteration is developed. In developing this method, the well known ABCD transmission matrix description of an analogue network is extended to the digital domain. Some areas for short to medium term further research/development are briefly noted.

Item Type:Articles
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Li, Professor Yun
Authors: Li, Y., and Rogers, E.
College/School:College of Science and Engineering > School of Engineering > Systems Power and Energy
Journal Name:International Journal of Control
ISSN:0020-7179
ISSN (Online):1366-5820

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