Vanderbauwhede, W. , Chalamalasetti, S.R., Purohit, S. and Margala, M. (2011) A few lines of code, thousands of cores: high-level FPGA programming using vector processor networks. In: Proceedings of the 2011 International Conference on High Performance Computing and Simulation (HPCS), Istanbul, Turkey, 4-8 July 2011. IEEE: Piscataway, NJ, USA, pp. 461-467. ISBN 9781612843803 (doi: 10.1109/HPCSim.2011.5999875)
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Publisher's URL: http://dx.doi.org/10.1109/HPCSim.2011.5999875
Abstract
MORA-C++ is a novel, high-efficiency FPGA dataflow programming framework. The framework, which consists of a compile-time configurable network of Vectorized Processors-in-Memory (PIM) cores, is programmed using a high-level C++ API. In this paper we present our work on support for vectorized cores and variable-size data path widths. Measurement results on our implementation for the SGI RC-100 platform show that, by instantiating over a thousand customized cores, the MORA-C++ framework can achieve throughputs very close to the I/O bandwidth of the system for a high-performance DCT application.
Item Type: | Book Sections |
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Status: | Published |
Glasgow Author(s) Enlighten ID: | Vanderbauwhede, Professor Wim |
Authors: | Vanderbauwhede, W., Chalamalasetti, S.R., Purohit, S., and Margala, M. |
College/School: | College of Science and Engineering > School of Computing Science |
Publisher: | IEEE |
ISBN: | 9781612843803 |
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