Scaling resonant tunnelling diodes and nanowires using SPICE modelling to optimise nanoscale performance

Ternent, G., Mirza, M.M. , Missous, M. and Paul, D. (2012) Scaling resonant tunnelling diodes and nanowires using SPICE modelling to optimise nanoscale performance. In: 12th IEEE Conference on Nanotechnology, Birmingham, UK, 20-23 Aug 2012, (doi:10.1109/NANO.2012.6322050)

Ternent, G., Mirza, M.M. , Missous, M. and Paul, D. (2012) Scaling resonant tunnelling diodes and nanowires using SPICE modelling to optimise nanoscale performance. In: 12th IEEE Conference on Nanotechnology, Birmingham, UK, 20-23 Aug 2012, (doi:10.1109/NANO.2012.6322050)

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Abstract

A simple geometric SPICE model has been developed to evaluate the effects of sidewall charge related current and depletion on the current-voltage characteristics of nanoscale resonant tunneling diodes (RTDs) and Si nanowires. The model confirms that sidewall current is the limiting mechanism for high performance nanoscale RTDs. The model can be developed to fully study the little understood parasitic currents in RTDs and nanowire devices where such currents potentially limit sensitivity. The model is used to analyse Si/SiGe and InGaAs based RTDs and Si nanowires down to 30 nm diameter RTDs and sub-10 nm Si nanowires.

Item Type:Conference Proceedings
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Mirza, Dr Muhammad M A and Ternent, Dr Gary and Paul, Professor Douglas
Authors: Ternent, G., Mirza, M.M., Missous, M., and Paul, D.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering

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