Impact of NBTI/PBTI on SRAM stability degradation

Cheng, B., Brown, A.R. and Asenov, A. (2011) Impact of NBTI/PBTI on SRAM stability degradation. IEEE Electron Device Letters, 32(6), pp. 740-742. (doi:10.1109/LED.2011.2136316)

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Publisher's URL: http://dx.doi.org/10.1109/LED.2011.2136316

Abstract

We investigate the impact of negative-bias temperature instability (NBTI) on the degradation of the static noise margin (SNM) and write noise margin (WNM) of a SRAM cell. This is based on the quantitative simulation of the statistical impact of NBTI on p-MOSFETs corresponding to a 45-nm low-power technology generation. Due to the increasing importance of positive-bias temperature instability (PBTI) of n-MOSFETs with the introduction of high-/v/metal gate stacks, we also explore the additional impact of PBTI on statistical SNM and WNM degradation behavior. The results indicate that NBTI-only induced SNM and WNM degradations follow different evolutionary patterns compared to the impact of simultaneous NBTI and PBTI degradation, and high distribution moment information is required for the reconstruction of noise margin distributions.

Item Type:Articles
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Brown, Mr Andrew and Cheng, Dr Binjie and Asenov, Professor Asen
Authors: Cheng, B., Brown, A.R., and Asenov, A.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
Journal Name:IEEE Electron Device Letters
Publisher:Institute of Electrical and Electronics Engineers
ISSN:0741-3106
Published Online:18 May 2011

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Project CodeAward NoProject NamePrincipal InvestigatorFunder's NameFunder RefLead Dept
501811ENIAC MOdeling and DEsign of Reliable, process variation-aware Nanoelectronic devices, circuits and systems (MODERN)Asen AsenovEngineering & Physical Sciences Research Council (EPSRC)EP/G04130X/1Electronic and Nanoscale Engineering