An EELS sub-nanometer investigation of the dielectric gate stack for the realization of InGaAs based MOSFET devices

Longo, P., Holland, M.C., Paterson, G.W. , Craven, A.J. and Thayne, I.G. (2010) An EELS sub-nanometer investigation of the dielectric gate stack for the realization of InGaAs based MOSFET devices. Journal of Physics: Conference Series, 241, 012034. (doi:10.1088/1742-6596/241/1/012034)

Longo, P., Holland, M.C., Paterson, G.W. , Craven, A.J. and Thayne, I.G. (2010) An EELS sub-nanometer investigation of the dielectric gate stack for the realization of InGaAs based MOSFET devices. Journal of Physics: Conference Series, 241, 012034. (doi:10.1088/1742-6596/241/1/012034)

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Publisher's URL: http://dx.doi.org/10.1088/1742-6596/241/1/012034

Abstract

In this paper, a subnanometer investigation of the Ga2O3/GdGaO dielectric gate stack deposited onto InGaAs is presented. Results regarding the influence of the growth conditions on the interface region from a chemical and morphological point of view are presented. The chemical information reported in this paper has been obtained using electron energy loss spectroscopy (EELS) that was carried out in a scanning transmission electron microscope ((S)TEM) showing both spatial and depth resolution.

Item Type:Articles
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Longo, Dr Paolo and Thayne, Professor Iain and Craven, Professor Alan and Paterson, Dr Gary and Holland, Dr Martin
Authors: Longo, P., Holland, M.C., Paterson, G.W., Craven, A.J., and Thayne, I.G.
College/School:College of Science and Engineering > School of Engineering
Journal Name:Journal of Physics: Conference Series
ISSN:1742-6596

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