Copper-plated 50 nm T-gate fabrication

Oxland, R. K., Li, X. , Ferguson, S., Bentley, S. and Thayne, I. G. (2010) Copper-plated 50 nm T-gate fabrication. Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures, 28(6), C6P7. (doi: 10.1116/1.3501346)

Abstract

In this article, the authors report for the first time a route to the realization of scalable sub-100 nm Cu-based <i>T</i>-gates using a fully subtractive, “silicon-compatible” process flow. High resolution electron beam lithography and a low-damage RIE etch process are used to transfer a 50 nm line into ICP-CVD silicon nitride. This pattern forms the <i>T</i>-gate foot. A single blanket metallization is then used to form the Schottky contact, the seed layer for the copperelectroplating and a barrier to prevent diffusion of the copper once deposited. A constant potential copperelectroplating process has been developed for a Ti/Pt seed layer. Copperfilms have been deposited with bulk sheet resistance <i>ρ</i>_sh∼0.1 Ω/□ (for a 300 nm film) and resistivity <i>ρ</i>=1.8×10−6 Ω cm. The head dimensions of the <i>T</i>-gate are realized by patterning resist on top of the seed prior to electroplating. Heads of width 500 nm were fabricated and shown to have a total gate resistance of Rg=150 Ω mm.

• Item Type: Articles
• Status: Published
• Refereed: Yes
• Glasgow Author(s) Enlighten ID: Thayne, Prof Iain and Bentley, Dr Steven and Li, Dr Xu and Oxland, Dr Richard
• Authors: Oxland, R. K., Li, X., Ferguson, S., Bentley, S., and Thayne, I. G.
• College/School: College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
• Journal Name: Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures
• Publisher: American Institute of Physics
• ISSN: 1071-1023
• ISSN (Online): 1520-8567
• Published Online: 28 October 2010