Simulation study of the 20nm gate-length implant-free quantum well p-MOSFET

Chan, K.H., Benbakhti, B., Riddet, C., Watling, J. and Asenov, A. (2011) Simulation study of the 20nm gate-length implant-free quantum well p-MOSFET. Microelectronic Engineering, 88(4), pp. 362-365. (doi:10.1016/j.mee.2010.09.025)

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Abstract

In this paper a drift diffusion simulation study of a 20 nm gate-length implant-free quantum well germanium p-MOSFET is presented, which covers the impact of mobility, velocity saturation and density of interface states on the transistor performance. The parasitic gate capacitance was also studied. The simulations show that the 20 nm gate-length implant-free quantum-well transistor design has good electrostatic integrity and performance potential.

Item Type:Articles
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Watling, Dr Jeremy and Asenov, Professor Asen and Benbakhti, Dr Brahim and Riddet, Mr Craig
Authors: Chan, K.H., Benbakhti, B., Riddet, C., Watling, J., and Asenov, A.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
Journal Name:Microelectronic Engineering
ISSN:0167-9317
Published Online:10 October 2010

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Project CodeAward NoProject NamePrincipal InvestigatorFunder's NameFunder RefLead Dept
467281Renaissance GermaniumAsen AsenovEngineering & Physical Sciences Research Council (EPSRC)EP/F032633/1Electronic and Nanoscale Engineering