Modeling and simulation of transistor and circuit variability and Reliability

Asenov, A. , Cheng, B., Dideban, D., Kovac, U., Moezi, N., Millar, C., Roy, G., Brown, A. and Roy, S. (2010) Modeling and simulation of transistor and circuit variability and Reliability. In: Custom Integrated Circuit Conference (CICC), San Jose, CA, USA, 19-22 September 2010, pp. 1-8. (doi:10.1109/CICC.2010.5617627)

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Abstract

Statistical variability associated with discreteness of charge and granularity of matter is one of limiting factors for CMOS scaling and integration. The major MOSFET statistical variability sources and corresponding physical simulations are discussed in detail. Direct statistical parameter extraction approach is presented and the scalability of 6T and 8T SRAM of bulk CMOS technology is investigated. The standard statistical parameter generation approaches are benchmarked and newly developed parameter generation approach based on nonlinear power method is outlined.

Item Type:Conference Proceedings
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Millar, Dr Campbell and Roy, Dr Gareth and Asenov, Professor Asen and Brown, Mr Andrew and Kovac, Mr Urban and Cheng, Dr Binjie and Roy, Professor Scott
Authors: Asenov, A., Cheng, B., Dideban, D., Kovac, U., Moezi, N., Millar, C., Roy, G., Brown, A., and Roy, S.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering

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