Dideban, D., Cheng, B., Moezi, N., Wang, X. and Asenov, A. (2010) Evaluation of 35nm MOSFET capacitance components in PSP compact model. In: 18th Iranian Conference on Electrical Engineering (ICEE), 2010, Isfahan, Iran, 11-13 May 2010, (doi: 10.1109/IRANIANCEE.2010.5507045)
Full text not currently available from Enlighten.
Abstract
In this paper the capacitance components of the PSP compact model which is selected as successor of BSIM4 by the Compact Modelling Council (CMC) are investigated and simulated in HSPICE for the state of the art 35nm MOSFET device. The simulations are compared with TCAD results in both transcapacitance components between the device terminals and time domain to show the impact of accuracy of compact model on real circuit simulations.
Item Type: | Conference Proceedings |
---|---|
Status: | Published |
Refereed: | Yes |
Glasgow Author(s) Enlighten ID: | Cheng, Dr Binjie and Wang, Dr Xingsheng and Asenov, Professor Asen |
Authors: | Dideban, D., Cheng, B., Moezi, N., Wang, X., and Asenov, A. |
College/School: | College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering |
University Staff: Request a correction | Enlighten Editors: Update this record