A framework for FPGA functional units in high performance computing

Koltes, A. and O'Donnell, J.T. (2010) A framework for FPGA functional units in high performance computing. In: IEEE International Symposium on Parallel and Distributed Processing, Atlanta, GA, 19-23 April 2010, (doi:10.1109/IPDPSW.2010.5470769)

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Publisher's URL: http://dx.doi.org/10.1109/IPDPSW.2010.5470769

Abstract

FPGAs make it practical to speed up a program by defining hardware functional units that perform calculations faster than can be achieved in software. Specialised digital circuits avoid the overhead of executing sequences of instructions, and they make available the massive parallelism of the components. The FPGA operates as a coprocessor controlled by a conventional computer. An application that combines software with hardware in this way needs an interface between a communications port to the processor and the signals connected to the functional units. We present a framework that supports the design of such systems. The framework consists of a generic controller circuit defined in VHDL that can be configured by the user according to the needs of the functional units and the I/O channel. The controller contains a register file and a pipelined programmable register transfer machine, and it supports the design of both stateless and stateful functional units. Two examples are described: the implementation of a set of basic stateless arithmetic functional units, and the implementation of a stateful algorithm that exploits circuit parallelism.

Item Type:Conference Proceedings
Additional Information:Proceedings ISBN: 9781424465330 <p/>(c) 2010 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other users, including reprinting / republishing this material for advertising or promotional purposes, creating new collective works for resale or redistribution to servers or lists, or reuse of any copyrighted components of this work in other works.
Keywords:FPGA, interface
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:O'Donnell, Dr John
Authors: Koltes, A., and O'Donnell, J.T.
Subjects:Q Science > QA Mathematics > QA75 Electronic computers. Computer science
College/School:College of Science and Engineering > School of Computing Science
Copyright Holders:Copyright © 2010 IEEE
First Published:First published in Proceedings of the 2010 IEEE International Symposium on Parallel and Distributed Processing
Publisher Policy:Reproduced in accordance with the copyright policy of the publisher

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