Fabrication of ultrashort T gates using a PMMA/LOR/UVIII resist stack

Chen, Y., MacIntyre, D.S., Cao, X., Boyd, E., Moran, D.A.J., McLelland, H., Holland, M., Stanley, C.R., Thayne, I. and Thoms, S. (2003) Fabrication of ultrashort T gates using a PMMA/LOR/UVIII resist stack. Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures, 21(6), pp. 3012-3016. (doi: 10.1116/1.1629292)

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Publisher's URL: http://dx.doi.org/10.1116/1.1629292

Abstract

In this article, we report a procedure for the fabrication of ultrashort T gates using high resolution electron beam lithography and a PMMA/LOR/UVIII resist stack. The intermediate lift-off resist (LOR) layer improves the quality of gate lithography, and consequently, device yields. It is unaffected by wet chemical gate recessing procedures and we report the application of the procedure to the fabrication of pseudomorphic and metamorphic high electron mobility transistors (pHEMTs) with 50 nm T gates. Fabricated pHEMTs had a gm of 600 mS/mm and ft of 200 GHz. Metamorphic HEMTs had a gm of 1500 mS/mm and ft of 350 GHz. We believe these are the fastest transistors of their kind in the world.

Item Type:Articles
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Thayne, Prof Iain and Thoms, Dr Stephen and Stanley, Professor Colin and Moran, Professor David
Authors: Chen, Y., MacIntyre, D.S., Cao, X., Boyd, E., Moran, D.A.J., McLelland, H., Holland, M., Stanley, C.R., Thayne, I., and Thoms, S.
Subjects:Q Science > QC Physics
T Technology > TJ Mechanical engineering and machinery
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
University Centres > Glasgow Materials Research Initiative
Journal Name:Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures
ISSN:1071-1023

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