Sub 100nm T-Gate uniformity in InP HEMT technology

Moran, D.A.J., Boyd, E., McEwan, F., McLelland, H., Stanley, C.R. and Thayne, I.G. (2004) Sub 100nm T-Gate uniformity in InP HEMT technology. In: International Conference on Compound Semiconductor Manufacturing Technology, Miami, Florida, USA, 3-6 May 2004,

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Publisher's URL: http://www.csmantech.org/Digests/2004/index.htm

Abstract

This work describes the improved uniformity of short gate length (sub100nm) T-gate lithography observed for InP HEMT devices through the development of a nonannealed ohmic contact process. The incorporation of such a process allows the reversal of ohmic and gate levels as part of a standard device process flow. This eliminates fluctuations in the gate geometry that result from the spinning of gate resists across a non-planar surface i.e. between the source and drain contacts.

Item Type:Conference Proceedings
Keywords:HEMT, sub100nm, T-gate, non-annealed, uniformity, self-aligned.
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Thayne, Professor Iain and Stanley, Professor Colin and Moran, Dr David
Authors: Moran, D.A.J., Boyd, E., McEwan, F., McLelland, H., Stanley, C.R., and Thayne, I.G.
Subjects:Q Science > QC Physics
T Technology > TK Electrical engineering. Electronics Nuclear engineering
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
University Centres > Glasgow Materials Research Initiative

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