Impact of strain on LER variability in bulk MOSFETs

Wang, X., Roy, S. and Asenov, A. (2008) Impact of strain on LER variability in bulk MOSFETs. In: Proceedings of the 38th European Solid-state Device Research Conference, 15-19 September 2008, Edinburgh, UK. IEEE Computer Society: Piscataway, N.J., USA, pp. 190-193. ISBN 9781424423637 (doi: 10.1109/ESSDERC.2008.4681730)

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Abstract

This paper presents the first comprehensive three-dimensional (3D) simulation results of modern strained nMOSFETs under the influence of statistical variability, induced by gate line edge roughness (LER). The focus is the impact of strain on the LER induced variability. Stress engineering is introduced and its effects are explored. New detailed results concerning strain variability induced by LER in the channel are demonstrated, and further strain enhanced variability is captured statistically. Finally, the effects of different LER magnitude on strained devices are investigated.

Item Type:Book Sections
Keywords:Channel, decananometer, device, devices, edge roughness, engineering, impact, intrinsic parameter fluctuations, line edge roughness, mosfet, mosfets, roughness, simulation, statistical variability, strain, variability
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Roy, Professor Scott and Wang, Dr Xingsheng and Asenov, Professor Asen
Authors: Wang, X., Roy, S., and Asenov, A.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
Publisher:IEEE Computer Society
ISBN:9781424423637

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