Brown, A., Roy, G. and Asenov, A. (2006) Impact of Fermi level pinning at polysilicon gate grain boundaries on nano-MOSFET variability:A 3-D simulation study. In: 34th European Solid State Devices Research Conference, Montreux, Switzerland, pp. 451-454.
Full text not currently available from Enlighten.
| Item Type: | Conference Proceedings |
|---|---|
| Keywords: | 6T SRAM, Design, Device, Devices, Fluctuations, Gate, Impact, Level, Simulation, SRAM, Technology |
| Status: | Published |
| Refereed: | Yes |
| Glasgow Author(s) Enlighten ID: | Roy, Dr Gareth and Asenov, Professor Asen and Brown, Mr Andrew |
| Authors: | Brown, A., Roy, G., and Asenov, A. |
| College/School: | College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering |
| Publisher: | IEEE |
University Staff: Request a correction | Enlighten Editors: Update this record
Deposit and Record Details
Deposit and Record Details