Breakdown mechanisms limiting the operation of double doped PHEMTs scaled into sub-100 nm dimensions

Kalna, K. and Asenov, A. (2002) Breakdown mechanisms limiting the operation of double doped PHEMTs scaled into sub-100 nm dimensions. In: The Fourth International Conference on Advanced Semiconductor Devices and Microsystems., Smolenice Castle, Slovakia, 14-16 Octber 2002, pp. 141-144. ISBN 078037276X

Abstract

The breakdown limit of pseudomorphic high electron mobility transistors (PHEMTs) with double delta-doping structure scaled down into sub-100 nm dimensions is extensively investigated by Monte Carlo device simulations. The two mechanisms responsible for breakdown are channel impact ionization and tunnelling from the gate. The double doped PHEMTs may have two possible placements of the second delta doping layer: either below the channel or between the gate and the first delta doping layer. Quantum mechanical tunnelling starts at very low drain voltages but quickly saturates, having a greater effect on those PHEMTs with the second doping layer placed above the original doping. The threshold for impact ionization occurs at larger drain voltages which should assure the reliable operation voltage scale of double doped PHEMTs. Those double doped PHEMTs with the second delta doping layer placed below the channel deteriorate faster with the reduction of the channel length due to impact ionization than those devices with the second doping layer above the original doping.

• Item Type: Conference Proceedings
• Status: Published
• Refereed: Yes
• Glasgow Author(s) Enlighten ID: Asenov, Professor Asen and Kalna, Dr Karol
• Authors: Kalna, K., and Asenov, A.
• Subjects: T Technology > TJ Mechanical engineering and machinery
• College/School: College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
• Research Group: Device Modelling Group
• Publisher: Institute of Electrical and Electronics Engineers
• ISBN: 078037276X
• Copyright Holders: Copyright © 2002 Institute of Electrical and Electronics Engineers
• First Published: First published in conference proceedings : the Fourth International Conference on Advanced Semiconductor Devices and Microsystems
• Publisher Policy: Reproduced in accordance with the copyright policy of the publisher