Self-aligned 0.12mm T-gate In.53Ga.47As/In.52Al.48As HEMT Technology Utilising a Non Annealed Ohmic Contact Strategy

Moran, D. A. J. , Kalna, K., Boyd, E., McEwan, F., McLelland, H., Zhuang, L. L., Stanley, C. R., Asenov, A. and Thayne, I. (2003) Self-aligned 0.12mm T-gate In.53Ga.47As/In.52Al.48As HEMT Technology Utilising a Non Annealed Ohmic Contact Strategy. In: ESSDERC '03 : 33rd Conference on European Solid-State Device Research, Estoril, Portugal, 16-18 September 2003, pp. 315-318. ISBN 0780379993 (doi:10.1109/ESSDERC.2003.1256877)

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Abstract

An InGaAs/InAlAs based HEMT structure, lattice matched to an InP substrate, is presented in which drive current and transconductance has been optimized through a double-delta doping strategy. Together with an increase in channel carrier density, this allows the use of a non-annealed ohmic contact process. HEMT devices with 120 nm standard and self-aligned T-gates were fabricated using the non-annealed ohmic process. At DC, self-aligned and standard devices exhibited transconductances of up to 1480 and 1100 mS/mm respectively, while both demonstrated current densities in the range 800 mA/mm. At RF, a cutoff frequency f/sub T/ of 190 GHz was extracted for the self-aligned device. The DC characteristics of the standard devices were then calibrated and modelled using a compound semiconductor Monte Carlo device simulator. MC simulations provide insight into transport within the channel and illustrate benefits over a single delta doped structure.

Item Type:Conference Proceedings
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Thayne, Professor Iain and McLelland, Mrs Helen and Stanley, Professor Colin and Moran, Dr David and Asenov, Professor Asen and Kalna, Dr Karol
Authors: Moran, D. A. J., Kalna, K., Boyd, E., McEwan, F., McLelland, H., Zhuang, L. L., Stanley, C. R., Asenov, A., and Thayne, I.
Subjects:T Technology > TK Electrical engineering. Electronics Nuclear engineering
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
Research Group:Device Modelling Group
Publisher:Institute of Electrical and Electronics Engineers
ISBN:0780379993
Copyright Holders:Copyright © 2003 Institute of Electrical and Electronics Engineers
First Published:First published in ESSDERC '03 : Proceedings of the 33rd Conference on European Solid-State Device Research (2003):315-318
Publisher Policy:Reproduced in accordance with the copyright policy of the publisher

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