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Gate recess engineering of pseudomorphic In0.30GaAs/GaAs HEMTs

Cameron, N.I., Murad, S., McLelland, H., Asenov, A., Taylor, M.R.S., Holland, M.C., and Beaumont, S.P. (1996) Gate recess engineering of pseudomorphic In0.30GaAs/GaAs HEMTs. Electronics Letters, 32 (8). pp. 770-772. ISSN 0013-5194

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Publisher's URL: http://ieeexplore.ieee.org/iel1/2220/10465/00491083.pdf?tp=&arnumber=491083&isnumber=10465

Abstract

The authors report how the performance of 0.12 μm GaAs pHEMTs is improved by controlling both the gate recess width, using selective dry etching, and the gate position in the source drain gap, using electron beam lithography. pHEMTs with a transconductance of 600 mS/mm, off state breakdown voltages >2 V, fτ of 120 GHz, f max of 180 GHz and MAG of 13.5 dB at 60 GHz are reported.

Item Type:Article
Status:Published
Refereed:Yes
Glasgow Author(s):Beaumont, Prof Steven and Asenov, Prof Asen
Authors: Cameron, N.I., Murad, S., McLelland, H., Asenov, A., Taylor, M.R.S., Holland, M.C., and Beaumont, S.P.
Subjects:T Technology > TK Electrical engineering. Electronics Nuclear engineering
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
Research Group:Device Modelling Group
Journal Name:Electronics Letters
Publisher:The Institution of Engineering & Technology
ISSN:0013-5194
ISSN (Online):1350-911X
Copyright Holders:Copyright © 1996 Institute of Electrical and Electronics Engineers
First Published:First published in Electronics Letters 32(8):770-772
Publisher Policy:Reproduced in accordance with the copyright policy of the publisher

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