Scalable Cryoelectronics for Superconducting Qubit Control and Readout

Quantum computing promises an exponentially higher computational power than classical computers; although all the building blocks have become available, certain constraints still prevent quantum advantage. The fundamental challenge in building a practical quantum computer is integrating thousands of highly coherent qubits with the control and readout electronics. The need for a high‐coherence qubit drives the effort for quantum error correction algorithms to create fault‐tolerant quantum systems. Error correction becomes tangible in a quantum processor only in large numbers of qubits. Thus, the other challenge is reducing the number of physical interconnects (coaxial lines) between the quantum–classical interface and bulky room‐temperature electronics. To interface thousands of qubits, interconnects can be reduced by bringing the control and readout electronics near the quantum processor. Cryogenic complementary metal–oxide–semiconductor (CMOS) technology has been an ideal candidate for this purpose. Integrated control and readout at cryogenic temperatures require low power dissipation circuit designs and techniques such as frequency‐division multiplexing (FDM) due to the finite cooling power of a dilution refrigerator. Herein, an overview of each building block in a superconducting quantum computer is provided, focusing on scalability. Furthermore, this article is concluded with an outlook discussing current challenges and future directions for the scalable superconducting control and readout.


Introduction
Quantum computers possess the efficacy of solving very hard computational tasks in a reasonable time compared to the tremendously huge time it would take for a classical computer. [1][2][3] While in quantum computers, quantum bits (qubits) replace traditional logic, they also require classical electronics to control and readout qubits, as shown in Figure 1a. Figure 1b-d represents the quantum computer's evolution from a conventional approach to scalable architecture. A qubit is the fundamental computational block in the quantum computer, enabling exponentially faster computation due to the properties superposition and entanglement. A qubit is a two-level system that can be in quantum state jψi, which can be represented as a superposition of its two computational basis states j0i and j1i. The two states occupy distinct levels, precisely analogous to classical digital logic zero and one. The state of a qubit has a distinct annotation as a point on the surface of a unit sphere called the Bloch sphere. As shown in Figure 1e, the north and south poles of the Bloch sphere represent the j0i and j1i states, respectively, whereas all other points on the surface of the Bloch sphere correspond to distinct superposition states jψi ¼ αj0i þ βj1i. An analogy can be drawn between the amplitude of the quantum superposition state and the classical analog of an averaged dutycycle signal. The two voltage levels, VDD and GND, when duty-cycled and averaged, provide all the levels between VDD and GND, S avg ¼ αVDD þ βGND, as shown in Figure 1f. Moreover, during the readout of quantum states, the output is either in states j0i or j1i. Similarly, during the readout of the duty-cycle averaged signal in the classical analog, the output is either VDD or GND.

Superconducting Transmon Qubits
There are several candidates for a qubit architecture to build quantum computers, including trapped ion qubits, spin qubits, superconducting qubits, and topological qubits. Transmon qubits, and all superconducting qubits, are based on microwave circuits, a technology that has matured and established interrogation components, fast operation, and the possibility to reach high coupling strengths between circuit elements, making the architecture ideal for high qubit integration. A Josephson junction (JJ) is a critical component of the superconducting transmon qubit. The JJ is a superconducting tunnel junction that is analogous to a nonlinear inductor (L J ). A transmon qubit consists of JJ DOI: 10.1002/aisy.202200079 Quantum computing promises an exponentially higher computational power than classical computers; although all the building blocks have become available, certain constraints still prevent quantum advantage. The fundamental challenge in building a practical quantum computer is integrating thousands of highly coherent qubits with the control and readout electronics. The need for a highcoherence qubit drives the effort for quantum error correction algorithms to create fault-tolerant quantum systems. Error correction becomes tangible in a quantum processor only in large numbers of qubits. Thus, the other challenge is reducing the number of physical interconnects (coaxial lines) between the quantum-classical interface and bulky room-temperature electronics. To interface thousands of qubits, interconnects can be reduced by bringing the control and readout electronics near the quantum processor. Cryogenic complementary metal-oxide-semiconductor (CMOS) technology has been an ideal candidate for this purpose. Integrated control and readout at cryogenic temperatures require low power dissipation circuit designs and techniques such as frequency-division multiplexing (FDM) due to the finite cooling power of a dilution refrigerator. Herein, an overview of each building block in a superconducting quantum computer is provided, focusing on scalability. Furthermore, this article is concluded with an outlook discussing current challenges and future directions for the scalable superconducting control and readout.  in parallel with a capacitor C, assembled to create a nonlinear resonator, as shown in Figure 2a. The nonlinear nature of the JJ creates anharmonicity, which is an uneven spacing between the energy levels of the transmon (ΔE 01 6 ¼ ΔE 12 6 ¼ ΔE 23 ), as shown in Figure 2b. Anharmonicity is a crucial characteristic that enables the operation of a transmon as a qubit when only its two lower energy levels are involved. A scalable quantum computer will require many qubits, with each qubit having its distinct transition frequency ðω 01 Þ. Consequently, a tunable frequency transmon qubit is needed, which can be implemented by changing the current I DC , as shown in Figure 2c. Tunability is achieved using a flux tunable Josephson junction loop or superconducting quantum interference device (SQUID). [4,5]

Quantum Control
Quantum computation requires performing independent rotations of the quantum state around the Bloch sphere axes, which are called X, Y, and Z gates. Figure 3a shows a single port XY control drive used to drive the qubit state rotations around an XY-plane. In order to independently drive the X and Y rotation on a single port of the qubit, an IQ mixer can be incorporated with the transmon qubit. [4,6] The IQ mixer combines the two X and Y control drive orthogonally at the qubit transition frequency ðω 01 Þ, enabling a single port XY control, as shown in Figure 3b,c. In the homodyne IQ mixing scheme shown in Figure 3c, the local oscillator frequency is equal to the qubit transition frequency ðω 01 Þ. The homodyne IQ mixing scheme is a straightforward concept. However, its implementation is rather challenging as qubit scaling will require a different local oscillator for each qubit, operating at a different frequency. A heterodyne mixing scheme, on the other hand, is a more suitable solution for multiqubit control, where the local oscillator frequency ðω LO Þ is fixed and the in-phase and quadrature components IðtÞ and QðtÞ are generated using the digital-to-analog converter (DAC) with the low-frequency component ω 01 À ω LO , as shown in Figure 3d. The output of the mixer drives the qubit with complete in-phase and quadrature control, similar to the homodyne mixing scheme. The Z control drive, shown in Figure 3a, can be used to control the qubit transition frequency ðω 01 Þ [7] , qubit initialization, [8] and two-qubit interactions. [9] A quantum algorithm is executed by driving the qubit with various waveforms stored in a database in a particular pattern. [10] A problem that arises with stored qubit waveform patterns is that waveform data point digital storage space for each qubit control instruction will consume considerable memory space. Moreover, the qubit phase needs to be tracked for coherent control and nonuniform sequential operations. [11] Furthermore, each qubit requires a distinct reference clock [12] for the qubit transition frequency ðω 01 Þ. To address these issues, a solution that has been proposed is the use of a numerically controlled oscillator (NCO) and direct digital synthesis (DDS), enabling power and area efficient qubit control [11,13,14] (Figure 3e). Over and above, the nonidealities (amplitude mismatch, phase error, and LO leakage) of the IQ mixer can significantly degrade the performance of the qubit control. These nonidealities can be mitigated using a digital IQ calibration scheme. [11]

Quantum Readout
The probabilistic nature of quantum mechanics does not allow the qubit state to be evaluated in a single measurement. Multiple statistical measurements of the qubit state ðjψi ¼ αj0i þ βj1iÞ are needed instead to evaluate the state j0i with probability jαj 2 and state j1i with probability jβj 2 . The qubit state measurement must be performed accurately with an error rate of 1% or lower for practical quantum algorithms. [15] A critical requirement of the precise readout setup is that the measurement setup or readout method may not interfere with the qubit state. A simple projective measurement approach could be to connect the qubit directly to the readout circuit through a capacitor C κ (Figure 4a). In this approach, the two states can be evaluated by monitoring the phase shift between the forward wave ða 1 Þ and reflected wave ðb 1 Þ. However, the readout circuit loads the qubit state, causing an error in the measurement. This error can be reduced by adding a linear resonator (frequency detuned from the qubit) that is coupled to the readout circuit through the capacitor C κ (Figure 4b). The addition of the readout resonator isolates the qubit and the readout circuit, enabling error reduction. The interaction between the qubit and the readout resonator in the dispersive regime shifts the readout resonator frequency depending on the qubit state. A bandpass filter (Purcell filter) around the readout resonator frequency ðω r Þ can be incorporated to reduce the error further, as shown in Figure 4c. Figure 4d shows the scalable control and readout architecture for a Figure 2. Superconducting qubit. a) Fixed frequency transmon qubit. b) Potential and energy diagram of a transmon qubit. c) Tunable frequency transmon qubit or dc-superconducting quantum interference device (dc-SQUID), adapted from Ref. [4,5].
www.advancedsciencenews.com www.advintellsyst.com superconducting qubit; the same architecture can also be used in spin qubits. [16] The control and readout electronics can be easily multiplexed between 10s or even 100s qubits. [17]

Performance Metrics/Characterization
The energy relaxation time (T 1 ) for the qubit can be characterized by first resetting the qubit to the j0i state, and then exciting the qubit to the j1i state using a X π pulse, as shown in Figure 5a. The state of the qubit is measured after a delay time τ. A single measurement will project the quantum state into either state j0i or state j1i. To estimate the probability, one must drive the qubit consistently, repeat the experiment multiple times, and take the ensemble average. The decoherence time (T 2 ) for the qubit can be characterized using Ramsey interferometry by first initializing the qubit to the j0i state, and then exciting the qubit to the www.advancedsciencenews.com www.advintellsyst.com equator (XY plane) using a X π=2 pulse, as shown in Figure 5b. After a delay time τ, a second X π=2 pulse is applied, and the state of the qubit is measured. The decay function is almost exponential, with a characteristic time T 2 . The decoherence time (T 2e ) for the qubit can be characterized using the Hahn echo experiment. The qubit is driven and measured in the same manner as the Ramsey interferometry experiment, except that a single X π pulse is applied midway through the free-evolution time τ, as shown in Figure 5c. Same as T 2 , the decay function is almost exponential, with a characteristic time T 2e . The j2i state population for the qubit is characterized by first initializing the qubit to the |0〉 state, and then exciting the qubit with a sequence of N pulses, as shown in Figure 5d. After the final pulse, the qubit state is measured using a readout scheme that differentiates the j0i, j1i, and j2i states. The undesirable state j2i will appear due to ω 12 transition frequency and represent the anharmonicity of the qubit. The Ramsey-style experiment characterizes the coherent qubit phase control over the two axes, as shown in Figure 5e. The qubit is first initialized to the state j0i and two X π=2 pulses are sandwiched by a Z θ gate of varying angles from 0°to 360°. After the qubit state measurement, the j1i probability is expected to be cosinusoidal. The qubit amplitude control can also be characterized using the Rabi experiment, as shown in Figure 5f. The qubit is first initialized to the state j0i, then X θ pulse is applied, and finally, the quantum state is readout. By applying pulses with increasing duration, the qubit angle of rotation φ is increased, producing an oscillating pattern called Rabi oscillation.

Quantum Hardware Challenges and Future Perspectives
For the quantum system to be truly scalable and perform fault-tolerant quantum computations, the electronics must be designed with high-performance, low-noise, and high power efficiency. Moreover, the high-frequency interconnects from the room temperature (300 K) electronics to the quantum processor at cryogenic temperature (<1 K) should be minimized, also to minimize the need for filtering of infrared photons. [18] Ideally, the electronics need to reside with the quantum processor at cryogenic temperatures to address the obstacles mentioned above; however, due to the dilution refrigerator's current cooling limitation, as a first step, cryogenic electronics can be placed close to the quantum processor with short high-frequency interconnects and using multiplexed circuit architecture. Efficient cryogenic circuits and systems can only be designed if reliable cryogenic CMOS (CryoCMOS) device models are available.
Existing CMOS device models are only available in the industrial www.advancedsciencenews.com www.advintellsyst.com temperature range (À40 to þ 125°C). Specialist cryogenic CMOS processes have not yet been developed. However, existing CMOS processes could be used as there have been indications that they function similar to the industrial temperature range with certain changes in specific parameters. Therefore, the development of cryogenic device models in existing CMOS processes is a field that is being investigated to develop reliable cryoCMOS circuits.
To select the most appropriate technology for the cryogenic circuit and system development, the characterization of MOS transistors close to qubit cryogenic temperatures needs to be studied extensively in several technologies like bulk CMOS, FinFET, and FD-SOI in terms of wideband and low-frequency noise, device mismatches, small-signal and large-signal device parameters, and DC and high-frequency response. Dynamic mismatch and offset cancellation techniques such as chopping, autozeroing, and dynamic element matching need to be incorporated to address the nonidealities in the circuits. Furthermore, foreground and background calibration techniques can be used to mitigate the timing skew and device mismatches to improve the performance of the essential building blocks such as ADC, DAC, mixer, voltage regulator, and temperature sensor. Another critical challenge is integrating derivative removal by the adiabatic gate (DRAG) and ac stark-shift compensation block in the circuit architecture to further improve coherence time and anharmonicity of the scalable quantum system. Figure 5. a) Longitudinal (energy) relaxation time (T 1 ) characterization setup. [5,19] b) Transverse (energy and decoherence) relaxation time (T 2 ) characterization via Ramsey interferometry. [5,19] c) Transverse (decoherence) relaxation time (T 2 ) characterization via a Hahn echo experiment. [5,19] d) j2i state population characterization setup with variable pulse duration. [4] e) Two axes coherent qubit control with a Ramsey-style experiment. [6,19] f ) qubit control with a Rabi experiment. [6,19] www.advancedsciencenews.com www.advintellsyst.com