Dutta, T. , Georgiev, V. and Asenov, A. (2021) Stability and Vmin analysis of ferroelectric negative capacitance FinFET based SRAM in the presence of variability. Solid-State Electronics, 184, 108100. (doi: 10.1016/j.sse.2021.108100)
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Abstract
For the first time, we analyse SRAM cells made of ferroelectric based negative capacitance (NC) FinFETs considering both global and local variability via Monte-Carlo circuit simulations. First we compare and explain the impact of variability on the device characteristics and the extracted figures of merit of conventional and NC transistors. Then we show that suppressed relative variability in NCFETs leads to lowering of the static Vmin (minimum supply voltage needed for SRAM operation) compared to conventional FinFET based SRAM. We use a physics based compact model for negative capacitance FinFETs realized by a self-consistent coupling of the standard BSIM-CMG compact model for FinFETs with the Landau-Khalatnikov (L-K) model of ferroelectrics. We demonstrate that on including the variability in the ferroelectric thickness and material parameters as well, the advantage of NCFETs diminishes. For the baseline FinFET, we have used model cards from a freely available predictive process design kit (PDK) for the 7 nm technology node where the parameters are optimized for SRAM applications.
Item Type: | Articles |
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Status: | Published |
Refereed: | Yes |
Glasgow Author(s) Enlighten ID: | Asenov, Professor Asen and Dutta, Dr Tapas and Georgiev, Professor Vihar |
Authors: | Dutta, T., Georgiev, V., and Asenov, A. |
Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering |
College/School: | College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering |
Research Group: | Device Modelling Group |
Journal Name: | Solid-State Electronics |
Publisher: | Elsevier |
ISSN: | 0038-1101 |
ISSN (Online): | 1879-2405 |
Published Online: | 02 June 2021 |
Copyright Holders: | Copyright © 2021 Elsevier |
First Published: | First published in Solid-State Electronics 184:108100 |
Publisher Policy: | Reproduced in accordance with the copyright policy of the publisher |
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