Impact of inter-gateway distance on LoRaWAN performance

Citoni, B., Ansari, S. , Abbasi, Q. H. , Imran, M. A. and Hussain, S. (2021) Impact of inter-gateway distance on LoRaWAN performance. Electronics, 10(18), 2197. (doi: 10.3390/electronics10182197)

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Abstract

The large-scale behaviour of LoRaWAN networks has been studied through mathematical analysis and discrete-time simulations to understand their limitations. However, current literature is not always coherent in its assumptions and network setups. This paper proposes a comprehensive analysis of the known causes of packet loss in an uplink-only LoRaWAN network: duty cycle limitations, packet collision, insufficient coverage, and saturation of a receiver’s demodulation paths. Their impact on the overall Quality of Service (QoS) for a two-gateway network is also studied. The analysis is carried out with the discrete-event network simulator NS-3 and is set up to best fit the real behaviour of devices. This approach shows that increasing gateway density is only effective as the gateways are placed at a distance. Moreover, the trade-off between different outage conditions due to the uneven distribution of spreading factors is not always beneficial, diminishing returns as networks grow denser and wider. In particular, networks operating similarly to the one analysed in this paper should specifically avoid SF11 and 12, which decrease the average overall PDR by about 7% at 10% nodes increment across all configurations. The results of this work intend to homogenise behavioural assumptions and setups of future research investigating the capability of LoRaWAN networks and provide insight on the weight of each outage condition in a varying two-gateway network.

Item Type:Articles
Status:Published
Refereed:Yes
Glasgow Author(s) Enlighten ID:Ansari, Dr Shuja and Imran, Professor Muhammad and Hussain, Dr Sajjad and Abbasi, Dr Qammer and Citoni, Mr Bruno
Creator Roles:
Citoni, B.Conceptualization, Formal analysis, Software, Validation, Visualization, Writing – original draft, Writing – review and editing
Ansari, S.Software, Validation
Abbasi, Q. H.Formal analysis, Validation, Writing – original draft, Writing – review and editing
Imran, M. A.Writing – review and editing
Hussain, S.Formal analysis, Validation, Writing – original draft, Writing – review and editing
Authors: Citoni, B., Ansari, S., Abbasi, Q. H., Imran, M. A., and Hussain, S.
College/School:College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
College of Science and Engineering > School of Engineering > Systems Power and Energy
Journal Name:Electronics
Publisher:MDPI
ISSN:2079-9292
ISSN (Online):2079-9292
Published Online:08 September 2021
Copyright Holders:Copyright © 2021 The Authors
First Published:First published in Electronics 10(18): 2197
Publisher Policy:Reproduced under a Creative Commons License

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Project CodeAward NoProject NamePrincipal InvestigatorFunder's NameFunder RefLead Dept
300756NPIF EPSRC Doctoral - University of Glasgow 2017Neil BoweringEngineering and Physical Sciences Research Council (EPSRC)EP/R512266/1S&E - Research Administration