SpiNNaker: Fault tolerance in a power- and area- constrained large-scale neuromimetic architecture

Navaridas, J. et al. (2013) SpiNNaker: Fault tolerance in a power- and area- constrained large-scale neuromimetic architecture. Parallel Computing, 39(11), pp. 693-708. (doi:10.1016/j.parco.2013.09.001)

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SpiNNaker is a biologically-inspired massively-parallel computer designed to model up to a billion spiking neurons in real-time. A full-fledged implementation of a SpiNNaker system will comprise more than 105 integrated circuits (half of which are SDRAMs and half multi-core systems-on-chip). Given this scale, it is unavoidable that some components fail and, in consequence, fault-tolerance is a foundation of the system design. Although the target application can tolerate a certain, low level of failures, important efforts have been devoted to incorporate different techniques for fault tolerance. This paper is devoted to discussing how hardware and software mechanisms collaborate to make SpiNNaker operate properly even in the very likely scenario of component failures and how it can tolerate system-degradation levels well above those expected.

Item Type:Articles
Glasgow Author(s) Enlighten ID:Yang, Dr Shufan
Authors: Navaridas, J., Furber, S., Garside, J., Jin, X., Khan, M., Lester, D., Luján, M., Miguel-Alonso, J., Painkras, E., Patterson, C., Plana, L. A., Rast, A., Richards, D., Shi, Y., Temple, S., Wu, J., and Yang, S.
College/School:College of Science and Engineering > School of Engineering > Systems Power and Energy
Journal Name:Parallel Computing
ISSN (Online):1872-7336
Copyright Holders:Copyright © 2013 The Authors
First Published:First published in Parallel Computing 39(11):693-708
Publisher Policy:Reproduced under a Creative Commons License

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